semiconductors

IBM and its joint development partners -- AMD, Chartered Semiconductor Manufacturing Ltd, Freescale, Infineon and Samsung -- announced an innovative approach to speed the implementation of a breakthrough material known as "high-k/metal gate" in next generation 32nm computer chips.

This new approach, an industry first based on what engineers call a 'high-k gate-first', process, is designed to provide a simpler, less time consuming way for clients to migrate to high-k metal gate technology in order to secure benefits that include improved performance and reduced power consumption.

Chips using the new technique will support a range of applications -- from low-power computer microchips targeted at wireless and other consumer-oriented devices to high-performance microprocessors for games and enterprise computing. This new approach to implementing high-k/metal gate will be available to IBM alliance members and their clients in the second half of 2009.

On January 29, 2007, IBM and its research partners (including Sony and Toshiba) introduced the "high-k/metal gate” innovation as the basis for a long-sought improvement to the transistor -– the tiny on/off switch that serves as the basic building block of virtually all microchips made today. Using the high-k/metal gate material in a critical portion of the transistor that controls its primary on/off switching function enabled the development of 32nm chip circuitry that is designed to be smaller, faster, and more power-efficient than previously thought possible.

Using high-k/metal gate IBM and its Alliance Partners have been able to successfully shrink the size of a chip by up to 50 percent as compared to the previous technology generation while improving a number of other performance specifications. For example, high-k metal gate chips save about 45 percent total power, an increasingly critical metric in all electronics applications.

Together these improvements will help to increase functionality and performance with lower power consumption and improved battery life in mobile devices. For microprocessor applications, this innovation also enables up to 30 percent higher performance as documented in measurements performed by IBM and its Alliance Partners at IBM’s East Fishkill, NY semiconductor manufacturing facility

"IBM’s alliances have demonstrated the "high-k gate-first" approach in a manufacturing environment, an achievement that provides clients with a simple, scalable pathway to incorporating the high k material innovation in semiconductor development without introducing additional design complexity," said Gary Patton, vice president, IBM's Semiconductor R&D Center on behalf of IBM's technology alliances. "This industry leading development comes from leveraging the collective engineering talent and breadth of market experience across the six Alliance Partner companies, as well as world class R&D facilities such as UAlbany NanoCollege’s Albany NanoTech complex, in order to maintain an aggressive road map.”

IBM and its Alliance Partners have developed low-power foundry Complementary Metal Oxide Semiconductor (CMOS) technology using the 'high-k gate-first' approach and have demonstrated the first 32nm ultra dense static random access memory (SRAM) in this low power technology with cell sizes below 0.15um2.

SRAMs are a key building block of computer chip designs and an excellent indicator of the readiness of a technology. The unique characteristics of the high-k material reduces total chip power consumption by as much as a 45 percent compared to the previous generation, a critical technology factor for achieving longer battery life in hand held devices such as cell phones, pagers, and PDAs.

In addition, IBM and its Alliance Partners have incorporated the high-k innovation into a new generation of high performance Silicon-On-Insulator (SOI) technology at 32nm. The unique high-k material properties enable a transistor speed improvement of greater than 30 percent over the previous generation of high performance Silicon-On-Insulator (SOI) technology.

The SRAM demonstrated in this new generation of high performance technology functions at a lower voltage -- an improvement that reduces the energy consumption for microprocessor applications. The use of SOI provides a significant performance and power benefit, which, in combination with the high-k/metal gate advancement, will help the technology deliver energy efficient chips used in applications such as games, personal computers, and high end computing systems.

The announcement marks the latest development achievement from this alliance of semiconductor manufacturing, development and technology companies that collaborate to address the product design and advanced process development challenges central to producing a smaller, faster, more cost efficient generation of semiconductors.

The answer is definitely a 'yes', if the country succeeds in finding the right path to move up in the value chain.

Nasscom, the premier trade body and the voice of Indian software industry, has set its expectations high on India in the space of intellectual property (IP) development and protection.

The organization believes that the Indian IT industry has to think beyond ‘services’ and focus more on product development. IP development should emerge as a key focus area in the coming years.

IBM scientists announced that they have measured the distribution of electrical charges in tubes of carbon that measure less than 2nm in diameter, 50,000 times thinner than a strand of human hair.

This novel technique, which relies on the interactions between electrons and phonons, provides a detailed understanding of the electrical behavior of carbon nanotubes, a material that shows promise as a building block for much smaller, faster and lower power computer chips compared to today's conventional silicon transistors.

Phonons are the atomic vibrations that occur inside material, and can determine the material's thermal and electrical conductivity. Electrons carry and produce the current. Both are important features of materials that can be used to carry electrical signals and perform computations.

The interaction between electrons and phonons can release heat and impede electrical flow inside computer chips. By understanding the interaction of electrons and phonons in carbon nanotubes, the researchers have developed a better way to measure their suitability as wires and semiconductors inside of future computer chips.

In order to make carbon nanotubes useful in building logic circuitry, scientists are pushing to demonstrate their high speed, high packing density and low power consumption capabilities as well as the ability to make them viable for potential mass production.

"The success of nanoelectronics will largely depend on the ability to prepare well characterized and reproducible nano-structures, such as carbon nanotubes," said Dr. Phaedon Avouris, IBM Fellow and lead researcher for IBM's carbon nanotube efforts. "Using this technique, we are now able to see and understand the local electronic behavior of individual carbon nanotubes."

To date, researchers have been able to build carbon nanotube transistors with superior performance, but have been challenged with reproducibility issues. Carbon nanotubes are sensitive to environmental influences. For example, their properties can be altered by foreign substances, affecting the flow of electrical current and changing device performance. These interactions are typically local and change the density of electrons in the various devices of an integrated circuit, and even along a single nanotube.

A better understanding of how the local environment affects the electrical charge of a carbon nanotube is needed to allow the fabrication of more reliable transistors. Therefore, the ability to measure local electron density changes in a nanotube is essential. A team of researchers from the IBM's T.J. Watson Research Center in Yorktown Heights have just solved this problem.

This achievement was published online October 14, 2007 in the journal Nature Nanotechnology. The team monitored the color of the light scattered from the nanotube (Raman Effect), and measured small changes in the color of the light corresponding to changes in the electron density in the nanotube. The technique takes advantage of the interaction between the motion of the atoms and the motion of the electrons, so that electron density changes can be reflected in changes of the frequency of the vibrational motion of the nanotube atoms.

In March 2006, IBM announced that its researchers built the first complete electronic integrated circuit around a single carbon nanotube molecule.